System Block Diagram

Fan Control

ClockGeneratot

IDT: 9LRS3199AKLFT SILEGO: SLG8SP587

133/120/100/96/14.318MHZ to PCH 48MHZto CardReader

rne/mix

PC\-E2.0x16 5GT/SPERLANE

Intel

Auburndale/ Clarksfield

Processor rPGA988A

Memory BUS(DDRIII)

204pin DDRIII-SO-DIMM X2

BANK 0, 1,2,3_

  1. 5V DDRIII 800/1066/1333 6.4G/8.5G/10.6G 100M/133M/166M(CFD)
  2. 5V DDRIII 800/1066/1333 6.4G/8.5G/10.6G 100M/133M/166M(CFD)
Mis Block Diagram For Bank System

PEG(DIS)

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